CFG4=CONSTANT_HIGH_THIS_, CFG3=CONSTANT_HIGH_THIS_, CFG5=CONSTANT_HIGH_THIS_, CFG6=CONSTANT_HIGH_THIS_, CFG7=CONSTANT_HIGH_THIS_, CFG1=CONSTANT_HIGH_THIS_, CFG0=CONSTANT_HIGH_THIS_, CFG2=CONSTANT_HIGH_THIS_
Pattern match interrupt bit slice configuration register
PROD_ENDPTS | A 1 in any bit of this field causes the corresponding bit slice to be the final component of a product term in the boolean expression. This has two effects: 1. The interrupt request associated with this bit-slice will be asserted whenever a match to that product term is detected. 2. The next bit slice will start a new, independent product term in the boolean expression (i.e. an OR will be inserted in the boolean expression following the element controlled by this bit slice). |
RESERVED | Reserved. Bit slice 7 is automatically considered a product end point. |
CFG0 | Specifies the match contribution condition for bit slice 0. 0 (CONSTANT_HIGH_THIS_): Constant HIGH. This bit slice always contributes to a product term match. 1 (STICKY_RISING_EDGEMA): Sticky rising edgeMatch occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 2 (STICKY_FALLING_EDGE_): Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 3 (STICKY_RISING_OR_FAL): Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 4 (HIGH_LEVEL_MATCH_F): High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register. 5 (LOW_LEVEL_MATCH_OCC): Low level. Match occurs when there is a low level on the specified input. 6 (CONSTANT_0_THIS_BIT): Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices). 7 (EVENT_NON_STICKY_RI): Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of option 3) . This bit is cleared after one clock cycle. |
CFG1 | Specifies the match contribution condition for bit slice 1. 0 (CONSTANT_HIGH_THIS_): Constant HIGH. This bit slice always contributes to a product term match. 1 (STICKY_RISING_EDGEMA): Sticky rising edgeMatch occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 2 (STICKY_FALLING_EDGE_): Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 3 (STICKY_RISING_OR_FAL): Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 4 (HIGH_LEVEL_MATCH_F): High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register. 5 (LOW_LEVEL_MATCH_OCC): Low level. Match occurs when there is a low level on the specified input. 6 (CONSTANT_0_THIS_BIT): Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices). 7 (EVENT_NON_STICKY_RI): Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of option 3) . This bit is cleared after one clock cycle. |
CFG2 | Specifies the match contribution condition for bit slice 2. 0 (CONSTANT_HIGH_THIS_): Constant HIGH. This bit slice always contributes to a product term match. 1 (STICKY_RISING_EDGEMA): Sticky rising edgeMatch occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 2 (STICKY_FALLING_EDGE_): Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 3 (STICKY_RISING_OR_FAL): Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 4 (HIGH_LEVEL_MATCH_F): High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register. 5 (LOW_LEVEL_MATCH_OCC): Low level. Match occurs when there is a low level on the specified input. 6 (CONSTANT_0_THIS_BIT): Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices). 7 (EVENT_NON_STICKY_RI): Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of option 3) . This bit is cleared after one clock cycle. |
CFG3 | Specifies the match contribution condition for bit slice 3. 0 (CONSTANT_HIGH_THIS_): Constant HIGH. This bit slice always contributes to a product term match. 1 (STICKY_RISING_EDGEMA): Sticky rising edgeMatch occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 2 (STICKY_FALLING_EDGE_): Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 3 (STICKY_RISING_OR_FAL): Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 4 (HIGH_LEVEL_MATCH_F): High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register. 5 (LOW_LEVEL_MATCH_OCC): Low level. Match occurs when there is a low level on the specified input. 6 (CONSTANT_0_THIS_BIT): Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices). 7 (EVENT_NON_STICKY_RI): Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of option 3) . This bit is cleared after one clock cycle. |
CFG4 | Specifies the match contribution condition for bit slice 4. 0 (CONSTANT_HIGH_THIS_): Constant HIGH. This bit slice always contributes to a product term match. 1 (STICKY_RISING_EDGEMA): Sticky rising edgeMatch occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 2 (STICKY_FALLING_EDGE_): Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 3 (STICKY_RISING_OR_FAL): Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 4 (HIGH_LEVEL_MATCH_F): High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register. 5 (LOW_LEVEL_MATCH_OCC): Low level. Match occurs when there is a low level on the specified input. 6 (CONSTANT_0_THIS_BIT): Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices). 7 (EVENT_NON_STICKY_RI): Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of option 3) . This bit is cleared after one clock cycle. |
CFG5 | Specifies the match contribution condition for bit slice 5. 0 (CONSTANT_HIGH_THIS_): Constant HIGH. This bit slice always contributes to a product term match. 1 (STICKY_RISING_EDGEMA): Sticky rising edgeMatch occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 2 (STICKY_FALLING_EDGE_): Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 3 (STICKY_RISING_OR_FAL): Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 4 (HIGH_LEVEL_MATCH_F): High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register. 5 (LOW_LEVEL_MATCH_OCC): Low level. Match occurs when there is a low level on the specified input. 6 (CONSTANT_0_THIS_BIT): Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices). 7 (EVENT_NON_STICKY_RI): Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of option 3) . This bit is cleared after one clock cycle. |
CFG6 | Specifies the match contribution condition for bit slice 6. 0 (CONSTANT_HIGH_THIS_): Constant HIGH. This bit slice always contributes to a product term match. 1 (STICKY_RISING_EDGEMA): Sticky rising edgeMatch occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 2 (STICKY_FALLING_EDGE_): Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 3 (STICKY_RISING_OR_FAL): Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 4 (HIGH_LEVEL_MATCH_F): High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register. 5 (LOW_LEVEL_MATCH_OCC): Low level. Match occurs when there is a low level on the specified input. 6 (CONSTANT_0_THIS_BIT): Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices). 7 (EVENT_NON_STICKY_RI): Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of option 3) . This bit is cleared after one clock cycle. |
CFG7 | Specifies the match contribution condition for bit slice 7. 0 (CONSTANT_HIGH_THIS_): Constant HIGH. This bit slice always contributes to a product term match. 1 (STICKY_RISING_EDGEMA): Sticky rising edgeMatch occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 2 (STICKY_FALLING_EDGE_): Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 3 (STICKY_RISING_OR_FAL): Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to. 4 (HIGH_LEVEL_MATCH_F): High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register. 5 (LOW_LEVEL_MATCH_OCC): Low level. Match occurs when there is a low level on the specified input. 6 (CONSTANT_0_THIS_BIT): Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices). 7 (EVENT_NON_STICKY_RI): Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of option 3) . This bit is cleared after one clock cycle. |